Generating arbitrary signals using an MCU is extremely useful. It can be used for example to play back any audio or make a modulator for a modem. The most needed MCU peripheral is of course a DAC, but it also needs other peripherals to efficiently play back the samples without loading the CPU.
This post shows how to implement a signal generator on an STM32L432 without using HAL libraries.
You can find a similar example for AVR XMEGA here.
The first thing is of course to have the audio samples stored somewhere. This example uses 77 samples of single cycle of a sinewave (keep reading why exactly 77). STM32L432 DAC can be use in 8-bit mode, so each sample is simply an uint8_t and is stored in flash.
The goal is to generate 2200 and 1200 Hz tones. So the samples have to be updated 1200*77 and 2200*77 times per second (because 77 samples make a single cycle). For the higher tone this effectively means an update rate of 169400 Hz which would put too much interrupt load on the CPU, so it is best handled using DMA. DMA just copies the consecutive samples from flash to the DAC register output address. DMA however does not know when to copy the samples (it could go as fast as the bus and memory subsystems allow), so yet another peripheral has to tell DMA when to do the transfer. In this example it is the general-purpose timer TIM2.
Not all timers can generate DMA requests. This is illustrated in the reference manual. In my case I just picked up DMA1 channel 1 (there are two separate DMA peripherals, each with their own channels), which means that I have to use timer TIM2 channel 3 (don’t confuse DMA channel with timer output compare channel).
Another issue that must be taken care of is the memory architecture. In case of STM32L4 this is not a problem, but in case of other STM32 you may be more limited (eg. only DMA2 could access the DAC memory region). It is usually shown in one of the first manual chapters:
The goal is to move data from flash to DAC. DAC is connected to APB1, which is connected to AHB1 (AHB is the “fast” system bus, APB is the slower bus). As you can see both DMA1 and DMA2 can access flash memory and both of them can also access AHB1 memory space.
Summing up:
- Timer TIM2 output channel 3 will tick at the appropriate update rates
- TIM2 output channel 3 will generate an event on overflow
- This event will trigger DMA1 channel 1 transfer
- DMA1 channel 1 will transfer data from flash to the DAC 8-bit output register
- DMA1 channel 1 will use circular mode, so when it reached the last sample it will start from the beginning
- The DAC knows nothing, it only has to be enabled and will update the voltage on every output register write
The code
Here is the code. It does not use HAL libraries and has no extra dependencies. APB1 frequency is 10 MHz (it is relevant for TIM2).
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#include <stm32l432xx.h> static const uint8_t SINEWAVE[] = { 126, 136, 146, 156, 166, 175, 185, 194, 202, 210, 217, 224, 230, 235, 240, 244, 247, 249, 251, 251, 251, 250, 248, 246, 242, 238, 233, 227, 221, 214, 206, 198, 189, 180, 171, 161, 151, 141, 131, 121, 111, 101, 91, 81, 72, 63, 54, 46, 38, 31, 25, 19, 14, 10, 6, 4, 2, 1, 1, 1, 3, 5, 8, 12, 17, 22, 28, 35, 42, 50, 58, 67, 77, 86, 96, 106, 116}; #define TIMER_RELOAD_FOR_2200Hz (2 * 59) #define TIMER_RELOAD_FOR_1200Hz (2 * 108) void dac_play_sinewave(void){ //pin initialization is done in pins.h RCC->APB1ENR1 |= RCC_APB1ENR1_DAC1EN_Msk; //enable clock to the DAC DAC->CR = DAC_CR_EN1; //enable DAC channel 1 RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN_Msk; //enable clock to DMA1 peripheral //set up DMA transfer, priority low, source size 8-bit, destination size 8-bit, DMA1_Channel1->CCR = DMA_CCR_MINC_Msk/*increment source memory address*/ | DMA_CCR_CIRC_Msk/*circular mode*/ | DMA_CCR_DIR_Msk/*direction from memory to peripheral*/; DMA1_Channel1->CNDTR = sizeof(SINEWAVE) / sizeof(SINEWAVE[0]); //how many data to transfer DMA1_Channel1->CMAR = (uint32_t)&SINEWAVE[0]; //source address - sine wave table DMA1_Channel1->CPAR = (uint32_t)&(DAC->DHR8R1); //destination address - DAC output register DMA1_CSELR->CSELR |= (0b0100 << DMA_CSELR_C1S_Pos); //TIM2_CH3 triggers DMA1 channel 1 DMA1_Channel1->CCR |= DMA_CCR_EN_Msk; //enable DMA channel //TIM2 is clocked from APB1 at 10MHz RCC->APB1ENR1 |= RCC_APB1ENR1_TIM2EN_Msk; //enable clock to TIM2 TIM2->CR1 = 0; //stop the timer TIM2->CNT = 0; //reset timer value TIM2->ARR = TIMER_RELOAD_FOR_2200Hz; TIM2->DIER = TIM_DIER_CC3DE_Msk; //enable timer channel 3 DMA request (goes to DMA channel 1) TIM2->EGR = TIM_EGR_CC3G_Msk; //channel 3 can generate events TIM2->CR1 = TIM_CR1_CEN_Msk; //start the timer } void dac_shift_frequency(void){ //this will alternate the ARR register between words for 1200 and 2200 Hz TIM2->ARR = (TIMER_RELOAD_FOR_2200Hz + TIMER_RELOAD_FOR_1200Hz) - TIM2->ARR; } void dac_deinit(void){ TIM2->CR1 = 0; //stop the timer DMA1_Channel1->CCR = 0; //disable DMA channel DAC->DHR8R1 = 0; //ouput 0 code DAC->CR = 0; //disable DAC RCC->APB1ENR1 &= ~(RCC_APB1ENR1_DAC1EN_Msk | RCC_APB1ENR1_TIM2EN_Msk); //disable clock to the DAC and TIM2 } |
Magic numbers
There are some magic numbers involved like the 77 sine wave samples, timer reload values 59 and 108. Where they come from? First of all – the timer reload value. It specifies how long the timer should count until it overflows and starts from zero again (so the higher the reload value, the lower the sample rate and the lower the output frequency). The timer runs of APB1 clocked at 10 MHz. To generate 1200 Hz using 77 samples they have to be updated at the rate of 1200 * 77 Hz, ie. 92400 Hz. The timer must overflow at that rate, so to calculate the reload word, divide 10’000’000 Hz by 92400 Hz and you will get 108.225… Of course the timer reload register only accepts integer values so it has to be 108. The difference between the ideal value and the one that can be put into the register will lead to a small frequency error.
To minimize the error I made a simple spreadsheet that calculated the average error for both tones vs. number of samples and found out that for 10 MHz APB clock the minimum error(0.2%) is at 77 samples.
After recording the audio with a sound card and measuring the frequency in Audacity I found out the frequencies to be exactly twice as high, so I multiplied the timer reload values by 2 without further investigation.
This is the final result (as recorded by Audacity):
I release this code into the public domain.